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Chip modules

Chip modules
The most important component of a smart card is naturally the chip. Of course, this very fragile component cannot be simply laminated to the surface of the card like a magnetic stripe. Instead, it needs a sort of enclosure to protect it from the rough everyday life of the card. This enclosure is the called the chip module. In addition to protection from ambient conditions, chips for contact-type smart cards need six or eight contacts, which provide power to the chip and allow data communications with the terminal. A portion of the module’s surface serves to provide these electrical contacts to the outside world. Naturally, the chip module should be as inexpensive as possible. A wide variety of module designs have been devised in the course of the development of smart cards in order to meet these two technical requirements – protection of the fragile
semiconductor chip and provision of contact surfaces. The most important of these are shown in Figures 3.14 and 3.15.

AT88SC153 Card,SLE5542 Card,SLE5528 Cards,ISO Contact Cards,

Figure 3.14 Classification of the various types of chip modules

AT88SC153 Card,SLE5542 Card,SLE5528 Cards,ISO Contact Cards,

Figure 3.15 These examples illustrate the evolution of the chip-on-flex process, starting with one of the first eight-contact chip-on-flex modules at the upper left and proceeding to contemporary modules with six or eight contacts

Electrical connections between the chip and the module
Electrical connections are required between the chip inside the module and the contacts on the outside of the module. Presently, two processes are primarily used for this. In the wire-bonding process, an automatic bonding machine attaches gold wires with a diameter of only a few micrometers between the chip and the rear surfaces of the contacts. The wires are electrically attached to the chip and the module using ultrasonic welding. With this process, the contact arrangement on the top surface of the chip is always opposite that of module. This has been a standard process in the semiconductor industry for some time, and it can be readily used for mass-producing chip modules. However, each chip must be electrically connected to the module by five wires, which naturally costs time and money. The die-bonding process was developed to further reduce the cost of fitting chips into modules. In this process, the electrical connections between the chip and module are not made with wires. Instead, the connections are made by mechanically attaching the chip to the rear surface of the module.

AT88SC153 Card,SLE5542 Card,SLE5528 Cards,ISO Contact Cards,

Figure 3.16 Photograph of the contact zone between a bonding wire and a bonding pad of a smart card microcontroller, magnified 1000 times (Source: Giesecke & Devrient)

TAB modules
Tape-automated bonding (TAB) was a standard process for large-volume chip packaging at the beginning of the 1990s, but it is presently not commonly used, since it has become technically obsolescent and too expensive. It is described here primarily for the sake of completeness.

AT88SC153 Card,SLE5542 Card,SLE5528 Cards,ISO Contact Cards,

Figure 3.17 View of the electrical connections between a smart card microcontroller (bottom) and the chip module (top), magnified 400 times (Source: Giesecke & Devrient)

A chip module produced using the TAB process is shown in Figure 3.18. The special feature of this process is that metallic bumps are first electrically attached to the pads of the chip, and the leads of the carrier film are then soldered to these bumps. The solder connections are so sturdy that no additional support is required for the chip, which hangs from its leads. The active surface of the chip is protected against ambient conditions by an encapsulation material. The advantages of the TAB process are the mechanical strength of the connections to the chip and the low profile of the module. However, these advantages come at the price of higher costs compared with other module preparation processes.

AT88SC153 Card,SLE5542 Card,SLE5528 Cards,ISO Contact Cards,

Figure 3.18 Cross-section of a chip module using the TAB process

Fitting a TAB module into a smart card is not easy, since the module must be taken into account in preparing the lamination foils for the card. Before the layers are laminated, suitable openings are punched in them, and the chip module is then inserted. The chip module is subsequently welded to the body of the card during the lamination process. This process provides a highly reliable bond between the chip module and the card body. It is nearly impossible to remove the chip from the card without destroying the card.

AT88SC153 Card,SLE5542 Card,SLE5528 Cards,ISO Contact Cards,

Figure 3.19 A TAB module ready for embedding in a smart card (left), and a TAB module fitted in a smart card (right)

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Figure 3.20 Inserting a TAB module during the lamination process

Chip-on-flex modules
Currently, the chip-on-flex module with wire-bonded contacts is the most widely used type of module. The construction of such a module is shown in cross-section in Figure 3.21.With this process, an opening into which the chip module can be glued is milled into the finished card body. The carrier material is a flexible circuit board made of fiberglass-reinforced epoxy resin with a thickness of 120 μm. The contacts are formed from a layer of copper laminated onto the carrier, with a thickness of 35 or 75 μm. The contact surfaces are electroplated with gold in a later process step to protect them against processes that could adversely affect their electrical conductivity, such as oxidation. Holes are punched into the carrier to receive the chips and wire bonds. The chips, which are around 200 μm thick, are taken from the sawn wafer by a pick-and-place robot and fitted into the openings in the circuit board. Next, the chip contacts are connected to the rear surfaces of the contacts using bonding wires a few micrometers in
diameter. Finally, the chip and the bonding wires are encapsulated in a blob of synthetic resin to protect them against ambient conditions. The total thickness of the finished module is typically around 600 μm.

 SLE5542 Card,SLE5528 Card,AT88SC153 Cards,AT88SC1608 Cards, 

Figure 3.21 Cross-section of a chip-on-flex chip module

 SLE5542 Cards,SLE5528 Cards,SLE5528 Offset Printing Card,SLE5528 Printing Cards

Figure 3.22 The four main process steps in the production of chip-on-flex modules

The advantage of this process is that it is largely based on a standard process used in the semiconductor industry for fitting chips in standard packages. It does not require as much specialized experience as the TAB process, so it less expensive. This process also lends itself well to producing very complex card bodies with many active components. This is because defective card bodies can be separated from the rest before the expensive chip modules have been fitted. The disadvantage of this process is that the thickness and the surface dimensions of the chip module are significantly greater that those of a TAB module, since not only the chip but also the bonding wires must be covered by the protective encapsulation. This is particularly disadvantageous, in that the standard smart card thickness of 0.76 mm does not leave a lot of room for overly thick modules.

AT88SC153 Cards,AT88SC1608 Cards,SLE5542 Cards,SLE5528 Cards,

Figure 3.23 Inserting the chip module in a milled opening in the card body

 SLE5528 Card,AT88SC153 Cards,AT88SC1608 Cards,SLE5542 Cards,SLE5528 Cards,SLE5528 Offset Printing Card,SLE5528 Printing Cards

Figure 3.24 Front and rear views of chip-on-flex modules on 35-mm tape. The five openings in the carrier circuit board, for the bonding wires that make the electrical connections to the chip, can be clearly seen in the rear view

 Contact Cards,SLE5542 Card,SLE5528 Card,AT88SC153 Cards,AT88SC1608 Cards,SLE5542 Cards,SLE5528 Cards,SLE5528 Offset Printing Card,SLE5528 Printing Cards,

Figure 3.25 Front and rear views of a chip-on-flex module for a dual-interface card

Lead-frame modules
Technically, the TAB and chip-on-flex processes leave something to be desired, since they both provide little scope for reducing production costs. In the TAB process, producing the card body is very costly due to the characteristics of the module, while in the chip-on-flex process, the complexity of the module and the use of wire bonding lead to unfavorable production costs. These problems led to the development of a new type of module, the lead-frame module, which is mechanically just as robust as TAB and chip-on-flex modules but has lower production costs. The structure of a lead-frame module is relatively simple. The contacts, which are stamped from a gold-plated copper alloy, are held together by a plastic mold body. The chip is placed onto the lead frame by a pick-and-place robot and then connected to the backs of the contacts using wire bonding. Next, the chip is covered by a protective blob of opaque epoxy resin, usually black. The lead-frame process is currently one of the least expensive processes for making chip modules, without any accompanying reduction in the mechanical robustness of the modules.

 SLE5528 Cards,SLE5528 Offset Printing Card,SLE5528 Printing Cards,

Figure 3.26 Cross-section through a lead-frame chip module

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Figure 3.27 Stamped-out lead-frame module with the two coil connections for a contactless smart card, with a match for comparison

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Figure 3.28 Lead-frame modules for contactless smart cards, arranged in pairs on a 35-mm tape. The two empty locations for modules that have been stamped out can be seen at the top

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Figure 3.29 Lead-frame modules for smart cards with contacts, arranged in pairs on a 35-mm tape

The chip-on-surface process
For chips with relatively small surface areas, a process available since the mid-1990s offers a technically very interesting alternative to the usual process of fitting chips into modules.With the MOSAIC (Microchip on Surface and in Card) process, developed by Soliac [Sligos], no module is needed for the chip, since it is located directly in the card body. The MOSAIC process is suitable for chips whose surface area is around 1 mm2. This presently limits its application to pure memory chips, since microcontrollers are still too large for this process. The process works as follows: first, a laser is used to remove material from the location where the chip is to be placed, and then the chip is glued into this recess. In the next step, a conductive silver paste is silk-screened onto the surface of the chip and the card body, thus forming contact surfaces and connecting them to the chip at the same time. In the final step, the chip and the leads to the contacts are covered with a non-conductive lacquer. This provides electrical insulation and protects them against external ambient conditions.

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Figure 3.30 The four stages in the production of a smart card using the chip-on-surface process

 SLE5528 Offset Printing Card,SLE5528 Printing Cards,

Figure 3.31 A memory chip with an edge length of 0.5 mm (0.25 mm2 area) and ISO/IEC 7816-3 contact surfaces, fitted to a telephone card along with its contacts using the chip-on-surface process

As can clearly be seen from the figure, the chip-on-surface process is highly suitable for mass production of large numbers of cards, since it essentially consists of only a brief laser milling of the card body and two printing processes. However, this process requires an extremely precise printing process to ensure that the contacts for the chip are located correctly. Up to now, the card body has been primarily made of polycarbonate, which is especially suitable for the chip-on-surface process. The production capacity for finished cards lies in the region of 5000 pieces per hour per machine. Another process is the flip-chip process in which the chip is placed with its face against the
rear surface of the module and electrically bonded, after which the assembled module is filled with a casting resin. This type of low-cost module is usually referred to as FCOS (flip-chip on substrate).

 SLE5542 Card,SLE5528 Card,AT88SC153 Cards,AT88SC1608 Cards,

Figure 3.32 Cross-section of a chip module made using the flip-chip process

This section provides a technical summary of current mobile telecommunication systems, to the extent that this is necessary for understanding the use of smart cards in this area. Significantly more detailed descriptions of all of the technical aspects of currently used mobile telecommunications networks can be found in J¨org Ebersp¨acher et al. [Ebersp¨acher 00], BernhardWalke [Walke 00] and Raymond Steele et al. [Steele 2001]. In this chapter, the term ‘mobile telecommunication system’ is used instead of ‘mobile telephone system’, since in all recent systems simple voice transmission is only one of many possible services, with the transmission of various types of data becoming increasingly more prominent.

Multiple-access methods
The frequency bandwidth available to a mobile telecommunication system, which is also called its frequency spectrum, is typically limited to a few tens of megahertz. In order to make this limited bandwidth quasi-concurrently available to as many subscribers as possible, ‘multipleaccess’ methods must be used. The purpose of such methods is to allow the greatest possible number of mobile stations within a cell to access the network with acceptable quality by suitably exploiting radio transmission techniques and information technology. There are basically four different types of multiple access methods. They differ in their cost of implementation and the efficiency with which they utilize the available bandwidth. These four methods are called frequency-division multiple access (FDMA), time-division multiple access (TDMA), code-division multiple access (CDMA) and space-division multiple access (SDMA). They are briefly described below.

FDMA (frequency-division multiple access)
With frequency-division multiple access, each transmitter is assigned a reserved frequency band within the total available frequency range. The transmitter is allowed to continuously and exclusively transmit within its assigned frequency band. With FDMA, each transmitter within a cell transmits on a different frequency. Incidentally, this is also the most commonly used method for conventional radio equipment, which uses a single common channel (a halfduplex link) for communications. If a full-duplex link is used (i.e., simultaneous uplink to the base station and downlink to the mobile station), which is usually the case for telephony, two frequency channels are naturally required to handle each call. Due to its limited technical complexity, FDMA is relatively well suited to mobile telecommunications using analog data transmission. For instance, frequency-division multiple access was used for the air interface between fixed and mobile stations in the German C-Netz. In this system, separate 4.44-MHz frequency bands were reserved for uplink and downlink, with each band being divided into 222 frequency channels, each 20 kHz wide.

TDMA (time-division multiple access)
With time-division multiple access, data are transmitted quasi-concurrently from several transmitters to a single receiver on a single frequency. Each transmitter is assigned a particular time slot, within which it is allowed to transmit exclusively but not continuously. In theGSMsystem, for example, the time slot available for a signal burst is 577 μs (15/26 ms), of which 546 μs are occupied by the signal burst to be sent within this interval. The difference between these twovalues (31 μs) is used as a guard time to accommodate small timing variations. Maintaining the necessary exact timing of the time slots requires very precise and technically complex synchronization between the transmitter and the receiver. Furthermore, the signal propagation time between the transmitter and the receiver must be taken into account when time-division multiple access is used. For example, the difference in signal propagation time between mobile stations in the immediate vicinity of a base station and mobile stations 30 km from the base station is approximately 100 μs. In practice, these propagation time differences must be offset by ‘premature’ transmission, so that the signals transmitted by the mobile stations always arrive at the base station exactly within the time slots reserved for them. Incidentally, the need to offset the transmission time in order to compensate for propagation time differences is what determines the maximum diameter of a cell in the GSM system. The maximum allowable interval for equalizing propagation times between the base station and the mobile station is 116.3 μs. This is the maximum time that a transmission can be sent prematurely and still arrive at the receiver within the prescribed time slot. This yields a maximum cell radius in the GSM system of approximately 35 km. Premature transmission is also called ‘timing advance’. In order to reduce the effects of frequency-selective interference, time-division multiple access can be combined with frequency hopping, in which both the transmitter and the receiver change frequency channels after each time slot in a predefined sequence. As a result, there is a high probability that interference in particular frequency ranges will only affect isolated signal bursts. In many cases, the results of such interference can be compensated using errorcorrecting transmission codes. An example of the use of time-division multiple access in combination with frequencydivision multiple access is the air interface between fixed and mobile stations in the GSM system. In this case, the available frequency band of 25 MHz is divided into 24 individual channels, each having a bandwidth of 200 kHz. Each of these frequency channels in turn is allocated eight call channels. This means that up to eight mobile stations can concurrently transmit on a single frequency channel, with each mobile station having access to the frequency channel for an interval of 0.577 ms every 4.615 ms.

CDMA (code-division multiple access)
Code-division multiple access is a multiple access method in which data are transmitted to a receiver by multiple transmitters that concurrently transmit signals within the entire available frequency spectrum. Code-division multiple access is based on spread-spectrum technology, in which an original narrow-band signal is expanded into a wide-bandwidth radio signal using a transmitter-specific mapping law and then transmitted as a wideband signal. This wideband signal is received by the receiver, where it can be transformed back into the original narrow-band signal by employing the known mapping law used by the transmitter. In the wideband code-division multiple access (WCDMA) variant, two separate frequency bands are used for uplink and downlink, for which reason this CDMA variant is often referred to as frequency-division/code-division multiple access (FD/CDMA). In the time-division/codedivision multiple access (TD/CDMA) variant, the uplink and downlink are separated by using different time slots. Code-division multiple access has the advantage of bring highly insensitive to frequencyselective interference. It also provides weak protection against unauthorized eavesdropping if the transmitter-specific mapping law is not known to the attacker. CDMA is used in the UMTS system in the WCDMA variant, using a bandwidth of 5 MHz each for uplink and downlink.

SDMA (space-division multiple access)
Space-division multiple access is a multiple access method for transmitting data in parallel from multiple transmitters to a receiver using a single frequency. For this purpose, the transmitters use directionally selective (adaptive) aerials aimed at specific receivers. This requires a relatively high level of technical complexity, so this method is presently used only to a limited degree for base stations in the mobile telecommunications sector. The directionally selective aerials are usually antenna arrays with electronic beam-steering capability. This makes it unnecessary to physically aim the aerial towards the receiver. Space-division multiple access can basically be combined with other multiple access methods, but it is presently seldom used in the mobile telecommunications sector due to its unfavorable cost/benefit ratio.

Combining the card body and the chip
The final step in the production process is implanting the modules from the semiconductor manufacturer or module producer into the prefabricated card bodies from the card manufacturer. The mechanical aspects are the most important in this step. Nonetheless, a certain amount of specialized expertise is needed to durably fit the modules into the cavities of the card bodies. This is not as simple as just pasting clippings into a scrapbook.

Implanting the module
Regardless of the method used to produce the card body and create a cavity for the module, the module must be embedded in the card body in the next step of the production process. Normally, a piece of double-sided hot-melt adhesive tape is used to attach the module to the card body. Only the supporting surface around the rim of the module is glued to the card body, with the encapsulated die in the middle of the module remaining free. The module is thus attached to the card body such that it ‘floats’ within the card body. To achieve this, the adhesive tape must be pre-punched and then applied to the modules on the 35-mm carrier tape so that it covers only the edges of the modules. After this, the individual modules are separated from the carrier tape and glued into the card bodies using the attached adhesive. The durability of the bond depends primarily on the proper combination of heat, pressure and time. The problem with this hot gluing process, which requires considerable expertise, is that the modules are briefly heated to around 180˚ C. This normally lasts approximately one second, but if it lasts too long the modules will be destroyed by being overheated. In any case, this brief heating artificially ages the chips, although this normally does not have any negative effect. The implanting machines used for card production can process around 2000 modules per hour, which amounts to one embedding operation every 1.8 seconds. Other methods, such as using liquid cold-setting glues, are also used, but the hot-gluing method is still considered to be very reliable. The main problems with using liquid glues that are injected into the milled cavity are the lack of a clearly defined adhesion surface and the tendency of the glue to harden over time. Once the module has been implanted in the card body and all the non-personal features and printing have been applied to the card, the mechanical production of the smart card is complete.

According to the ISO 10202-1 standard, Phase 2 of the smart card life cycle describes the loading of all data that are not card-specific as well as implanting the chips in prepared card bodies. Phase 2 and Phase 3 are frequently carried out by a single firm, although in such firms the two phases are normally fully separated, both organizationally and physically, for reasons of security. A production planning and control (PPC) system is frequently used to coordinate these complicated production processes. The various finishing machines draw their data from this system, and in parallel with this, they report current processing status to a central control station. This minimizes the time and costs involved in controlling the mass production of smart cards. An additional benefit of the PPC system is that networking the processing equipment makes the data needed for quality assurance and testing available for near-real-time evaluation.

Data transfer
The card issuer or application provider must provide the card personalizer with all the data related to his application. This includes information such as the name of the application, the structure of the file tree, the required files and the file structures. This information is loaded into the cards when they are initialized. Furthermore, the personalizer also needs all customer-specific and system-specific data, such as secret card-specific keys and the names and addresses of the cardholders. This information is transferred using diskettes, magnetic tapes or data telecommunications. The personalization data are almost always sensitive with regard to security, which means that the transport path and data transfer must be suitably protected. Consequently, the data are normally encrypted. The associated decryption key is naturally transported to the personalizer via a different route than the data. This means that the personalization data are worthless if they are lost, since it is not possible to decrypt them without the key. However, there are many smart card applications in which no transfer of card-specific data takes place. The best-known example is SIMs for the GSM mobile telecommunication system, which are not manufactured for a particular card producer, but instead contain only individual card data and keys. The data sets needed for this purpose are usually generated directly by the card producer and reported back to the application operator, so that the latter knows which cards have been produced. The only sense in which a data transfer takes place is that the card producer receives the data that are the same for all cards and the initial and final values for the card-specific data. The data sets for each of the individual cards are then generated in security modules located in the finishing equipment.

Electrical testing
The first production step of this phase is an electrical test of the smart card. A basic test is made by performing the ISO smart card activation sequence, to which the card must respond with a valid ATR. If the ATR can be received and it meets expectations, it is certain that at least the core of the microcontroller is operational. Following this come special tests for the hardware components, such as the ROM, EEPROM and RAM. Special machines that can process multiple cards in parallel are used to achieve high throughput with these tests, some of which can take up to several seconds. Machines with a throughput of up to 6000 cards per hour are typically used. The preferred way to test the operation of the EEPROMis to write a ‘checkerboard’ pattern, such as’AA’(◦1010 1010◦) or’55′(◦0101 0101◦), to the individual bytes. However, since this would take a long time, particularly with large EEPROMs, a trick is sometimes used to shorten the test. Instead of using the specified EEPROMwrite time, which might for example be 3.5 ms per page, only one-tenth of this time is used (350 μs in this example). Data will be retained in the EEPROM for only a few minutes when such a short write time is used, but this does not cause any problems here, since the checkerboard-pattern memory test is completed a few seconds after the data have been written. The advantage of this dynamic form of EEPROM programming is that it significantly speeds up testing without reducing the quality of the testing. The same technique is sometimes used when the transmit and receive buffers of the I/O manager are located in EEPROM instead of RAM. In this case, the reduced write time yields a marked increase in the effective data transmission rate. There is another interesting trick that is used in electrical testing. In order to reduce the amount of time required to load data in subsequent production steps, a final test pattern (such as’00′) is written to the entire EEPROM using the normal write time. Since the value already stored in the memory is known in the subsequent processes of completion, initialization and personalization, only the data that are different from this value have to be actually written to the EEPROM. A similar technique can be used to set the contents of the EEPROM to a value that makes it unnecessary to first erase the page to be written for subsequent write operations. Both of these tricks distinctly reduce the times required to carry out subsequent production steps in which data are written to the EEPROM.

Most operating systems are only partially contained in the mask-programmed ROM of the smart card. The link tables and portions of the program code are loaded into the EEPROM of the smart card only after an authentication using a secret key. The process of loading the EEPROM portion of the operating system is called completing the operating system. This approach allows minor modifications to be made to the ROMprogram code, in order to correct errors or adapt the code to special applications without being forced to generate a new ROM mask. The smart card operating system is not fully present in the smart card until the EEPROM data have been written to the card. After this, it is possible to execute all application commands, such as SELECT and READ RECORD. Card completion, which involves data that are the same for all cards for a particular application, is performed using high-throughput machines that process multiple cards in parallel, just as with the incoming inspection of cards.

Completing the card provides it with the software that is necessary for the next production step, which consists of loading all the data belonging to an application that are the same for all smart cards used with that application. This consists of the application data that do not vary from card to card and all other non-personal data that are the same for every smart card. This step is called initialization. At the file level, initialization consists of creating all necessary files (MF, DFs and EFs) and filling them as much as is possible with the application data. In many cases, the file contents are predefined by the applicable specifications (such as GSM 11.11). With modern operating systems, initialization is performed using the CREATE, UPDATE BINARY and UPDATE RECORD commands. This is the last processing step in which all smart cards are treated the same. Consequently, initialization can also be performed using fast parallel machines. Cardspecific application data and personal data are not loaded into the smart card until the following step, which is called personalization. The reason for distinguishing between general, global data and specific, personal data in the finishing process relates to minimizing production costs. Personalization machines that can write specific data to each individual smart card under the required security conditions are technically complex and have a throughput of around 700 cards per hour. They are also usually equipped with relatively slow labeling units for the card bodies. This results in high unit costs for loading data into the cards. Consequently, an attempt is always made to load all global data, which does not differ from card to card, into the cards using simpler and faster initialization machines, which can process around 3500 cards per hour. The bottleneck for both initialization and personalization is transmitting the data to the card and writing it to the EEPROM. The time required for write accesses to the EEPROM cannot presently be reduced, due to technical limitations. However, the time required to transmit the initialization and personalization data can be drastically reduced by increasing the clock rate and reducing the divider value. For example, many initialization and personalization machines use data transmission rates of up to 115 kbit/s, instead of the usual value for smart cards of 9600 bit/s. This can reduce the initialization or personalization time by a factor of nearly two. The following sample calculation clearly illustrates that even small time optimizations can be worthwhile in the mass production of smart cards. Here we assume that one million cards are to be initialized with 4 kB (4096 bytes) of data each, using two initialization machines operating for two shifts (16 hours) per day. We also assume that initialization is performed using 40 commands and the T = 1 transmission protocol, with 12 data bits for each byte of transmitted data. In addition, the EEPROM write cycle time is 3.5 ms for a 4-byte page, and a prior erase operation is not necessary. The transport time for the initialization machines, which are not equipped with terminals for parallel processing, is 1 second per smart card, and any dead time that may occur (for loading or emptying bins, for example) is not taken into account. The resulting cycle time is thus the sum of the EEPROM writing time, the data transmission time and the transport time. Using the formulas given in Section 15.2(‘Formulas for Estimating Processing Times’) with a data transmission rate of 9600 bit/s, we obtain a processing time of 90.7 days. If the data transmission rate is increased to 38.4 kbit/s, the time required to process one million cards drops to 52.5 days. A data transmission rate of 115 kbit/s would be ideal, since at this rate card production could be completed more than 46 days earlier than at 9600 bit/s. From this example, it is clear that particularly when a large amount of data must be stored in the smart cards, it is worthwhile to invest time and effort in optimizing the processing. The described increases in the data transmission rate depend only on the smart card operating system and do not require any special chip hardware, such as would be necessary for writing the data to the EEPROM faster. Consequently, it is possible to reduce the initialization time for all suitably prepared smart cards.